IDEC Journal of Integrated Circuits and Systems, Vol. 2, No. 3, Oct 2016 |
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Page(s): C1-C2 |
JICAS of Photovoltaics publication information
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Design of FET structure for high frequency in 65nm CMOS process Dae-Gwang Jang, Ji-Hoon Kim, and Young-Woo Kwon Page(s): 1-6 |
Su-Jin Jeon, JiHoon Kim, Myung-Gi, Ji Jun-Hee Park and Young-Wan Choi Page(s): 7-13 |
Multi Stage Noise Shaping Delta-Sigma Modulator Jaeseong Lee and Jeongjin Roh Page(s): 14-19 |
Chung-Jae Lee and Jong-In Song Page(s): 20-25 |
Subin Kim and Joungho Kim Page(s): 26-31 |
Digital Foreground Self-Calibration of Capacitor Mismatch for SAR ADCs In-June Yeo and Byung-Geun Lee Page(s): 32-37 |
A4WP High Efficiency Wireless Power Transmitting Unit Young-Jun Park, WooSeob Kim, Seong-Mun Park, and Kang-Yoon Lee Page(s): 38-44 |
A Method to Increase the Spatial Resolution at a Photon-Counting Detector under Charge Sharing Daehee Lee, Kyeongjin Park, and Gyuseong Cho Page(s): 45-50 |